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Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
FEATURES
* 16 small swing DCM outputs * Translates any differential input signal (LVPECL, LVHSTL, LVDS, DCM) to DCM levels without external bias networks * Translates single ended input levels to DCM levels with a resistor bias network on the nCLK input * Translates single ended input levels to inverted DCM levels with a resistor bias network on the CLK input * Maximum output frequency: 500MHz * Output skew: 100ps (maximum) * Part-to-part skew: 650ps (maximum) * VOH: 850mV (maximum) * 3.3V operating supply * 0C to 70C ambient operating temperature
GENERAL DESCRIPTION
The ICS8501 is a low skew, 1-to-16 Differential Current Mode Fanout Buffer and a member of HiPerClockSTM the HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8501 is designed to translate any differential signal levels to small swing differential current mode (DCM) output levels. An external reference resistor is used to set the value of the current supplied to an external load load/termination resistor. The load resistor value is chosen to equal the value of the characteristic line impedance of 50. The ICS8501 is characterized at an operating supply voltage of 3.3V.
ICS
The small swing outputs, accurate crossover voltage and duty cycle makes the ICS8501 ideal for interfacing to today's most advanced microprocessors.
BLOCK DIAGRAM
CLK nCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8
PIN ASSIGNMENT
nCLK VDD Q15 nQ15 Q14 nQ14 GND Q13 nQ13 Q12 nQ12 VDD
VDD Q11 nQ11 Q10 nQ10 GND Q9 nQ9 Q8 nQ8 VDD nc
48 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 24
ICS8501
CLK VDD nQ0 Q0 nQ1 Q1 GND nQ2 Q2 nQ3 Q3 VDD
48-Lead LQFP 7mm x 7mm x 1.4mm body package Y Package Top View
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RREF VDD Q7 nQ7 Q6 nQ6 GND Q5 nQ5 Q4 nQ4 VDD
REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
Name VDD Q11, nQ11 Q10, nQ10 GND Q9, nQ9 Q8, nQ8 nc RREF Q7, nQ7 Q6, nQ6 Q5, nQ5 Q4, nQ4 Q3, nQ3 Q2, nQ2 CLK nCLK Q15, nQ15 Q14, nQ14 Q13, nQ13 Q12, nQ12 Type Power Output Output Power Output Output Unused Input Output Output Output Output Output Output Input Input Output Output Output Output Description Positive supply pins. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Power supply ground. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. No connect. Reference current input. Used to set the output current. Connect to 475 resistor to ground. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Differential output pair. Differential current mode interface levels. Non inver ting differential clock input. Inver ting differential clock input. Differential output pair. Differential current Differential output pair. Differential current Differential output pair. Differential current Differential output pair. Differential current
TABLE 1. PIN DESCRIPTIONS
Number 1, 11, 14, 24, 25, 35, 38, 48 2, 3 4, 5 6, 19, 30, 43 7, 8 9 , 10 12 13 15, 16 17, 18 20, 21 22, 23 26, 27 28, 29 36 37 39, 40 41, 42 44, 45 46, 47
mode mode mode mode
interface interface interface interface
levels. levels. levels. levels.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD ROUT Parameter Input Capacitance Power Dissipation Capacitance (per output) Output Impedance Test Conditions Minimum Typical 2 4.6 14 Maximum Units pF pF KW
VDD = 3.465V, f = 250MHz
TABLE 3. FUNCTION TABLE
Inputs CLK 0 1 0 1 Biased; NOTE 1 Biased; NOTE 1 nCLK 1 0 Biased; NOTE 1 Biased; NOTE 1 0 1 Q0:Q15 0 1 0 1 1 0 Outputs nQ0:nQ15 1 0 1 0 0 1 Input to Output Mode Differential to Differential Differential to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Polarity Non Inver ting Non Inver ting Non Inver ting Non Inver ting Inver ting Inver ting
NOTE 1: Please refer to the Application Information Section, Wiring the Differential Input to Accept Single Ended Levels.
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
4.6V -0.5V to VDD + 0.5 V -0.5V to VDD + 0.5V 47.9C/W (0 lfpm) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, TA = 0C TO 70C
Symbol VDD IDD Parameter Positive Supply Voltage Power Supply Current Test Conditions Minimum 3.135 Typical 3.3 Maximum 3.465 70 Units V mA
TABLE 4B. DIFFERENTIAL DC CHARACTERISTICS, VDD = 3.3V5%, TA = 0C TO 70C
Symbol IIH IIL VPP VCMR Parameter Input High Current Input Low Current CLK, nCLK CLK, nCLK Test Conditions VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V 0.31 LVPECL Levels 1.8 Minimum Typical Maximum 5 5 1.3 2.4 1.3 Units A A V V V
Peak-to-Peak Input Voltage Common Mode Input Voltage; NOTE 1, 2
DCM, HSTL, LVDS, SSTL Levels 0.31 NOTE 1: Common mode voltage is defined as VIH. NOTE 2: For single ended applications, the maximum input voltage for CLK, nCLK is VDD + 0.3V.
TABLE 4C. HCSL DC CHARACTERISTICS, VDD = 3.3V5%, TA = 0C TO 70C
Symbol IOH VOH VOL Parameter Output High Current; NOTE 1 Output HighVoltage; NOTE 2 Output Low Voltage; NOTE 2 Test Conditions 3.135 VDD 3.465V RREF = 475, RLOAD - 50 RREF = 475, RLOAD - 50 Minimum 11 600 Typical 14 710 0 Maximum 17 850 0.05 Units mA mV V %
Output Crossover Voltage; NOTE 3 40 60 VOX NOTE 1: IOH is the current per output being supplied to the load and should be included in the total supply current calculation. Therefore, IDD (total) is equal to IOH * 16 + IDD. NOTE 2: Outputs terminated with 50 to VDD - 2V. NOTE 3: Define with respect to output voltage swing at a given condition.
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Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
Test Conditions Measured at the -3dB rolloff of the peak-to-peak output voltage 0 < f 250MHz 0 < f 250MHz Measured on at VOX Measured on at VOX 20% to 80% 175 tPERIOD/2 - 0.3 tPERIOD/2 Minimum Typical Maximum 500 2 2 3 3 100 650 700 tPERIOD/2 + 0.3 Units MHz ns ns ps ps ps ns
TABLE 5. HCSL AC CHARACTERISTICS, VDD = 3.3V5%, TA = 0C TO 70C
Symbol Parameter fMAX t p LH, t p HL Output Frequency Propagation Delay; Low-to-High Propagation Delay; High-to-Low Output Skew; NOTE 1, 3 Par t-to-Par t Skew; NOTE 2, 3 Output Rise/Fall Time Output Pulse Width
tsk(o) tsk(pp)
tR / tF tPW
Current adjust set for VOH = 0.7V. Measurements refer to PCIEX outputs only. NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential cross points. NOTE 2: Defined as the skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDD/2. NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
PARAMETER MEASUREMENT INFORMATION
3.3V5%
VDD
VDD
SCOPE
HCSL
Qx
nCLK
V
PP
Cross Points
V
CMR
CLK
GND
GND
0V
3.3V HCSL OUTPUT LOAD AC TEST CIRCUIT
DIFFERENTIAL INPUT LEVEL
nQx Qx nQy Qy
PART 1 nQx Qx PART 2 nQy Qy
tsk(o)
tsk(pp)
OUTPUT SKEW
PART-TO-PART SKEW
nQ0:nQ15
80% Clock Outputs
80% VSW I N G
Q0:Q15
20% tR tF
20%
Pulse Width t PERIOD
HCSL OUTPUT RISE/FALL TIME
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OUTPUT PULSE WIDTH/PERIOD
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER APPLICATION INFORMATION
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = VDD/2 is generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio
of R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock swing is only 2.5V and VDD = 3.3V, V_REF should be 1.25V and R2/R1 = 0.609.
VDD
R1 1K Single Ended Clock Input CLK V_REF nCLK C1 0.1u
R2 1K
FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc. DIFFERENTIAL CLOCK INPUT INTERFACE
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
here are examples only. Please consult with the vendor of the driver component to confirm the driver termination requirements. For example in Figure 2A, the input termination applies for ICS HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver from another vendor, use their termination recommendation.
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both VSWING and VOH must meet the VPP and VCMR input requirements. Figures 2A to 2D show interface examples for the HiPerClockS CLK/nCLK input driven by the most common driver types. The input interfaces suggested
3.3V 3.3V
3.3V 1.8V
Zo = 50 Ohm
Zo = 50 Ohm CLK Zo = 50 Ohm nCLK LVHSTL ICS HiPerClockS LVHSTL Driver R1 50 R2 50
R3 50 LVPECL Zo = 50 Ohm
CLK
nCLK
HiPerClockS Input
HiPerClockS Input
R1 50
R2 50
FIGURE 2A. HIPERCLOCKS CLK/NCLK INPUT DRIVEN ICS HIPERCLOCKS LVHSTL DRIVER
BY
FIGURE 2B. HIPERCLOCKS CLK/NCLK INPUT DRIVEN 3.3V LVPECL DRIVER
BY
3.3V 3.3V 3.3V R3 125 Zo = 50 Ohm CLK Zo = 50 Ohm nCLK LVPECL R1 84 R2 84 HiPerClockS Input R4 125
3.3V
3.3V
LVDS_Driv er
Zo = 50 Ohm
CLK
R1 100
Zo = 50 Ohm
nCLK
Receiv er
FIGURE 2C. HIPERCLOCKS CLK/NCLK INPUT DRIVEN 3.3V LVPECL DRIVER
BY
FIGURE 2D. HIPERCLOCKS CLK/NCLK INPUT DRIVEN 3.3V LVDS DRIVER
BY
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER RELIABILITY INFORMATION
TABLE 6. JAVS. AIR FLOW TABLE
FOR
48 LEAD LQFP
JA by Velocity (Linear Feet per Minute)
0
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 67.8C/W 47.9C/W
200
55.9C/W 42.1C/W
500
50.1C/W 39.4C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS8501 is: 1358
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Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
FOR
PACKAGE OUTLINE - Y SUFFIX
48 LEAD LQFP
TABLE 7. PACKAGE DIMENSIONS
JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS SYMBOL N A A1 A2 b c D D1 D2 E E1 E2 e L ccc 0.45 0 --0.05 1.35 0.17 0.09 BBC MINIMUM NOMINAL 48 --1.40 0.22 -9.00 BASIC 7.00 BASIC 5.50 Ref. 9.00 BASIC 7.00 BASIC 5.50 Ref. 0.50 BASIC 0.60 --0.75 7 0.08 1.60 0.15 1.45 0.27 0.20 MAXIMUM
Reference Document: JEDEC Publication 95, MS-026
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
Marking ICS8501BY ICS8501BY Package 48 Lead LQFP 48 Lead LQFP on Tape and Reel Count 250 per tray 1000 Temperature 0C to 70C 0C to 70C
TABLE 8. ORDERING INFORMATION
Part/Order Number ICS8501BY ICS8501BYT
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8501BY
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REV. B OCTOBER 3, 2003
Integrated Circuit Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
REVISION HISTORY SHEET Description of Change Pin Description Table - changed VDD and GND descriptions. Function Table - revised NOTE 1. Added Power Supply Table. Added HCSL Table. Changed VOH max. spec from 1.2V to 850mV; conver ted min. from 0.6V to 600mV and typical from 0.71V to 710mV. Changed units of VOX from V to % and added note 3. Added Applications Section. Updated format throughout data sheet. Date
Rev
Table T1 T3 T4A T4C T5
Page 2 2 3 3 6&7
B
10/3/03
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REV. B OCTOBER 3, 2003

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